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-- Company: 
-- Engineer: 
-- 
-- Create Date: 2022/08/03 16:19:25
-- Design Name: 
-- Module Name: MUX2_1 - Behavioral
-- Project Name: 
-- Target Devices: 
-- Tool Versions: 
-- Description: 
-- 
-- Dependencies: 
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

ENTITY MUX2_1 IS
    PORT (
        A, B, C : IN BOOLEAN;
        Y : OUT BOOLEAN
    );
END MUX2_1;

ARCHITECTURE Behavioral OF MUX2_1 IS
BEGIN
    PROCESS (A, B, C) IS
        VARIABLE N : BOOLEAN;
    BEGIN
        IF A THEN
            N := B;
        ELSE
            N := C;
        END IF;
        Y <= N;
    END PROCESS;
END Behavioral;